The demand for smaller and more efficient electronic devices has led to the continued scaling of CMOS technologies with respect to both device dimensions and supply voltages. In order to meet these design constraints while retaining high performance characteristics (e.g., overcoming various short channel effects), CMOS circuits are often required to have ultra-low gate oxide thicknesses and consequently ultra-low threshold voltages. Such devices have a greater susceptibility to significant leakage due to various device effects. Some of these effects result in significant leakage current/power during standby mode operation of the device, while other effects result in significant leakage current/power during active mode operation of the device. All of these factors have made it critical for circuit designers to evaluate and optimize leakage current/power in both standby and active modes of operation.
Because leakage current amplitude typically has a magnitude in the nA or pA range, simulation of leakage current/power in electronic design automation (EDA) tools is required to be highly accurate. Current approaches for simulating leakage current for a given circuit require the circuit to reach a quiescent state before an accurate measurement of leakage current/power can be determined. Additionally, users are required to estimate the time needed for the circuit to reach a quiescent state in order for an accurate measurement of leakage current/power can be determined.
These approaches suffer from several disadvantages. Because the circuit is required to reach a quiescent state in order for an accurate measurement of leakage current/power to be determined, a substantially long transient simulation is often required. Additionally, requiring the user to estimate the time needed for the circuit to reach a quiescent state is often unreliable and can result in inaccurate simulation results or unnecessarily long transient simulation times. Because of the lack of predictability in estimating the time needed for a circuit to reach a quiescent state, it becomes very difficult to accurately measure leakage current/power, especially when the circuit is operating in an active mode.